Hardware and Software Implementation of Artificial Neural Network in Hybrid CPU-FPGA Platform

Lim Chun Ming, Zaini Abdul Halim, Tan Earn Tzeh


Artificial neural network (ANN) has been widely used in many applications and has been started to be implemented in embedded system. Recently hybrid platform like Altera DE1-SOC that contains both processor and FPGA had been introduced. When using this type of platform, artificial neural network can be either implemented in processor using software implementation or in FPGA using hardware implementation. Analysis should be done to see whether processor or FPGA is a better choice for the ANN. This paper presented the framework for implementation of ANN in processor and FPGA of Altera DE1-SOC and analyzed the efficiency of implementation of ANN in processor and in FPGA in terms of accuracy, execution time and resources utilization. Several multilayer perceptron (MLP) models with different number of inputs, number of hidden neurons and types of activation function had first been trained in MATLAB and after that, these trained models had been implemented in both processor and FPGA of Altera DE1-SOC. Experiments had been carried out to test and measure the performance of these MLP models in processor and FPGA. After comparing output result with ANN that run in MATLAB and computing the mean squared error (MSE), results showed that the ANN in processor has 100% accuracy and ANN in FPGA has minimum MSE of 7.3 x 10-6. Meanwhile ANN in FPGA is 20 times faster than ANN in processor. Therefore, if accuracy is main priority and execution time is not so important in a system, ANN is suggested to be implemented in processor. However, if execution time of ANN must be fast like less than microsecond in a system, ANN is suggested to be implemented in FPGA.

Type of Paper:

Keywords: Artificial neural network (ANN), Multilayer Perceptron (MLP), Altera DE1-SOC, Processor, FPGA

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